Silicon Carbide (SiC) integrated circuit (IC) process is capable of operating at very high temperatures. This process, however, is only capable of producing depletion mode n-channel JFET transistors. Thus, designing a logic gate with only this type of transistor may present a challenge.
An alternative design improving the output voltage range and decreasing the physical layout size of the logic gate may be beneficial. Designs that better accommodate variations in wafer processing, such as non-uniformities reported to exist in modern SiC IC epilayers, may also be beneficial.